In recent years, an operation processing system is implemented by mixing a central processing unit (CPU) and a field programmable gate array (FPGA) as processors in a data center in order to attain speeding up of data processing or reduction of power consumption. The FPGA is a programmable integrated circuit (large scale integration (LSI)) and is used as hardware of which algorithm is capable of being corrected and expanded in the operation processing system described above.
As examples of the prior art, for example, Japanese Laid-open Patent Publication No. 9-26870 and Japanese Laid-open Patent Publication No. 2006-236106 are known.